The invention relates generally to control circuits used with electronic switches, and more particularly to control circuits used with logic circuitry whose so-called high-side output signals must be level-shifted to drive an electronic switch.
FIG. 1 depicts a prior art H-bridge circuit in which a DC voltage (Vhv) is selectively coupled via switches Sh1, Sh2, Sl1, Sl2 to a load 10. In practice, Vhv may be on the order of 100 VDC, although other magnitudes could be used. Switches Sh1 and Sh2 are referred to as high-side switches in that they control current flow between the high voltage potential Vhv and the load. These switches control the high side of an H-bridge (when used with such configuration), and their control signals, Vhs1, Vhs2 are referenced to Vs or Vhv, rather than to a common ground that is shared with logic unit 40. Switches Sl1 and Sl2 are typically referenced to system ground and are termed low-side switches.
A control unit 20 must develop high-side and low-side control signals to cause switches Sh1 and Sl1 turn on or off, while switches Sh2 and Sl2 turn off or on, e.g., switch in complementary fashion. Control unit 20 receives operating potential from a power source 30, which also powers a logic unit 40. Although not explicitly shown in FIG. 1, power source 30 also provides control unit 20 with a higher potential voltage whose magnitude is at least Vhv. It will be appreciated that it is relatively easy for control unit 20 to generate control signal Vls1 to control switch Sl1 and control signal Vls2 to control switch Sl2, as switches Sl1, Sl2 are referenced to ground. However it is a more challenging task for control unit 20 to generate control signals Vhs1 and Vhs2 to control high-side switches Sh1, Sh2, as these control signals are referenced to the floating potential Vs. Because the present invention will be directed to generating high-side control signals Vhs1 or Vhs2, these control signal paths are shown with solid lines in prior art FIG. 1, whereas the low-side control signals are shown with phantom lines.
Regardless of how the high-side and low-side control signals are generated, it will be appreciated that if the various switch pairs Sh1-Sl1, and Sh2-Sl2 can be switched correctly, current can be made to flow from power source Vhv through the load, in one direction or the other, to ground. For example, if Sh1 and Sl1 are closed (as shown in FIG. 1) current will flow from Vhv through Sh1 through the load, through Sl1, to ground. If control unit 20 causes Sh1 and Sl1 to open, and causes Sl2 and Sh2 to close, current can then flow from Vhv through Sh2 through the load through SI2 to ground. In this fashion, DC energy from source Vhv can be effectively converted to AC current flowing through the load.
Ideally control unit 20 should provide the required high-side voltage level-shifted control signals Vhs1, Vhs2 to the high-side switches Sh1, Sh2 without dissipating high power. Preferably control signals Vhs1, Vhs2 output from control unit 20 should exhibit high noise immunity, e.g., should maintain correct logic state in the presence of transient components, and should also exhibit short propagation delays through the control circuit. But as noted, it can be a challenging task to efficiently generate the high-side control signals Vhs1, Vhs2.
Some prior art level-shifting control circuits use continuous control signals and simply accept the resulting high power dissipation needed to achieve short propagation delays. This statement is especially true where the voltage level-shifting control circuit is implemented with discrete components, as opposed to being fabricated on a common integrated circuit (IC). Other prior art approaches use pulse circuits that include latches to conserve power dissipation while still providing short propagation delay. Unfortunately, however, these pulse circuits may be susceptible to noise resulting from transistor switching, from power supply transients, and/or from electrostatic discharge (ESD). U.S. Pat. No. 5,870,266 to Fogg (1999) entitled xe2x80x9cBridge Control Circuit and Methodxe2x80x9d discloses a control system that uses both continuous and/or continuous and pulsed control signals in an attempt to reduce power dissipation and maintain good noise immunity, while trying to achieve short propagation delay. However a Fogg type control system can be somewhat complex in its implementation.
Thus, there is a need for a control unit for an electronic switch that provides high-side level-shifted control signals Vhs1, Vhs2. while achieving short propagation delay, low power dissipation, and high noise immunity. Preferably such a control unit should generate these control signals without the complexity of using both pulsed and continuous control signals.
The present invention provides such a control unit.
The present invention provides a control unit for an electronic switch that provides level-shifted high-side control signals Vhs1, with short propagation delay, with low power dissipation and improved noise immunity, without using pulsed and continuous control signals. Advantageously, propagation delay improvement is obtained from passive current sinking capacitors.
The control circuit is coupled to power sources Vhv, Vdd, and to ground, and receives a logic input signal Vin (or complementary DC logic drive signals S2, and {overscore (S2)}) and outputs a high-side control signal Vhs1 (or Vhs2) that can be used to control a high-side electronic switch, e.g., an NMOS transistor Sh1 (or Sh2) in an electronic switch configuration. In one aspect, the control circuit includes a logic circuit, an current mirror Ibias generator, a level shift circuit that preferably includes a passive current sink mechanism comprising capacitors, and a load circuit from which Vhs1 (or Vhs2) is obtained. Alternatively, the present invention can function to output a high-side control signal to certain switch configurations, using the Ibias generator and a portion of the level shift circuit.
The complementary DC signals are used by the level shift circuit to determine the desired output logic state for Vhs1. The Ibias generator establishes and provides a holding current to maintain correct logic states after the initial transition between states, even in the presence of noise.
Within the level shift circuit, a totem-pole arrangement of solid state devices is coupled between Vdd and ground. The arrangement comprises a PMOS device, an NMOS device, and a second NMOS device that is configured as a current source that mirrors (directly or proportionally) the Ibias current. The source node of a third NMOS device is coupled between the PMOS and NMOS devices in the totem-pole, the gate node is coupled to Vdd, and the drain node serves as an interface to a load circuit coupleable to Vhv+Vdd. A capacitor is coupled across the second NMOS device current source. When S2 transitions from logical xe2x80x9c0xe2x80x9d to xe2x80x9c1xe2x80x9d is in a first DC state, current flows from the drain of the interface NMOS device. A high-side switch in an electronic switch configuration can thus be triggered with control signals that vary in amplitude from Vhv+Vdd to Vdd.
Other features and advantages of the invention will appear from the following description in which the preferred embodiments have been set forth in detail, in conjunction with the accompanying drawings.